RAM (16 x 4) - 74x189

Logic Symbol:

Logic Diagram:

Function Table:

Code:

	module memory_16x4(O,D,CS,WE,clk,A);
	output reg [3:0] O;
	input [3:0] D;
	input [3:0] A;
	input CS,WE,clk;
	reg [3:0] memory[0:15];
	always @(posedge clk)
	begin
	if (~CS)
	begin
	if (WE == 1)
	O = ~(memory[A]);
	else if (WE == 0)
	memory[A] = D;
	end
	else
	O = 4'bZZZZ;
	endmodule

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